By Vijay Madisetti, Chonlameth Arpnikanondt
The platform-centric SoC technique is aimed toward the layout of today’s SoC structures with emphasis on real-time, embedded structures. The strategy offers a suggestion and an SoC layout atmosphere that promotes an integration of state of the art instruments and methods useful for the advance of the platforms. It renders a brand new and higher point of view in the direction of co-design ways, whereas additionally elevating a degree of layout abstraction. as the configurable platform gadgets are designed off-cycle, they give a contribution to a normal development in improvement time. by means of incorporating their utilization, the general process moves a stability among overall layout flexibility and minimum time-to-market.
In bankruptcy 1, demanding situations within the co-design of SoCs are brought. The bankruptcy in short describes the technical demanding situations dealing with method builders and introduces a proposed strategy to the matter. the rest of this ebook provides a extra thorough exam at the challenge and the proposed approach.
Chapter 2 describes the proposed platform-centric SoC layout process intimately. It illustrates the layout stream and discusses each one major step within the layout approach. Definition of a platform as initially outlined via Sabbagh , in addition to the platform-based and platform-centric layout ways, are awarded. The bankruptcy concludes by means of evaluating the proposed process with past similar work.
Chapter three lays out the technological history for the proposed SoC layout process. while the platform expertise is mentioned in bankruptcy 2, this bankruptcy supplies an outline of the opposite primary applied sciences: the Unified Modeling Language (UML) and the Extensible Markup Language (XML). The bankruptcy starts off with an creation to UML as a modeling device rather well perceived in the software program engineering group. it truly is by means of a dialogue on an test by way of the thing administration crew (OMG) to empower UML for the improvement of real-time embedded software program – an attempt in an effort to ultimately culminate in a layout framework referred to as the UML Profile for Schedulability, functionality, and Time Specification . Thereafter, an summary of XML and some different comparable net applied sciences ensue.
Chapter four outlines the constitution of the library of platform gadgets (LPO), in addition to furnishes a complete guide and requisites specification platform item needs to own with a purpose to be scalable and appropriate with the proposed procedure. crucial parts for every platform item, e.g. structure blueprint, XML-based self-described modules, platform handling device, etc., also are mentioned intimately.
Chapter five presents a close therapy of UML extensions for the improvement of real-time embedded platforms. The bankruptcy begins with a structure of the Co-design Modeling Framework (CMF) hierarchy that encompasses 5 different sub-profiles – the universal software profile (PCUprofile), the Exception Modeling profile (EMprofile), the Interrupt Modeling profile (IMprofile), the Synthesizable Description Language profile (SHDLprofile), and the structure Blueprint profile (ABprofile). every one of those profiles furnishes a layout framework that's particularly adapted for the proposed technique, and will be capable of meet with the demanding situations posed by means of the layout and attempt of real-time embedded SoC-based platforms. The bankruptcy, then, proceeds to debate the area thought for every sub-profile, by way of the outline of the corresponding stereotypes.
Chapter 6 applies the platform-centric SoC layout approach, utilizing the CMF profile in UML, to the improvement of a simplified camera method which will exhibit the use and the robustness of the proposed procedure. particularly, the NiOS improvement board is used to imitate the camera approach the place uncooked snapshot information are learn from a charge-coupled gadget (CCD), after which JPEG encoded and kept into reminiscence. The bankruptcy starts with an outline of the Altera’s NiOS method, via the particular process improvement technique that explicitly demonstrates using the proposed strategy. A quantitative evaluate is then awarded that compares the advance expense of the proposed platform-centric SoC layout process opposed to a few substitute methods utilizing price estimation versions and tools.
Chapter 7 concludes the publication with a precis and a dialogue of destiny instructions for this attempt on platform-based layout.
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Extra info for A Platform-Centric Approach to System-on-Chip (SOC) Design
Based on pre-characterized hardware components, it implements data path macros directly using a tool such as Synopsys’s Module Compiler, while the control logic is translated into VHDL and synthesized. In this approach, algorithms are mapped directly into hardware that derives its parallelism not from multiple CPUs, but from a multitude of distributed arithmetic units. Although the current results claim to be two to three orders of magnitude more efficient in power and area than architectures based on software processors, the chip-in-a-day approach finds its limitations in the following: It still cannot improve upon the execution time.
Detailed discussion regarding each main stage in the proposed approach is attempted next. 1 Platform-Independent Specification This stage chiefly concerns with the derivation of the functional specification that is still independent of any platform instance binding. Unlike most current co-design approaches that begin with a formal specification of the system, the proposed platform-centric method starts with the requirements capturing process. Kotonya and Sommerville  define a “requirement” as a statement of a system service or constraint.
While class and object diagrams are static model views; sequence, activity, statechart, and collaboration diagrams represent dynamic characteristics. A sequence diagram details how operations are carried out, what messages are sent, and when. Sequence diagrams are organized according to time. The time progresses vertically down the page. The objects involved in the operation are listed from left to right according to when they partake in the message sequence. A message in a sequence diagram is asynchronous if it allows its sender to send additional messages while the original is being processed.
A Platform-Centric Approach to System-on-Chip (SOC) Design by Vijay Madisetti, Chonlameth Arpnikanondt